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凤凰科技 2026-04-16

C.C. Wei pushes back at Intel: TSMC (台积电) claims packaging lead as CoWoS capacity set to surge to 170,000 units/month by 2027, reportedly

TSMC defends its edge

TSMC (台积电) chief executive C.C. Wei (魏哲家) has pushed back after Intel stepped up its foundry and packaging ambitions, arguing that TSMC still offers the best commercial chip-packaging solutions for advanced nodes. It has been reported that Wei made the comments in the context of mounting competition from Intel’s IDM and packaging plays — a recognition that packaging, not just transistor scaling, will decide leadership in high-performance and AI-dominated markets.

Reportedly, TSMC's Chip-on-Wafer-on-Substrate (CoWoS) capacity will expand sharply, rising to about 170,000 units per month by 2027. CoWoS is TSMC’s premium 2.5D/3D packaging approach used widely in datacenter GPUs and AI accelerators. If these capacity plans materialize, TSMC would be positioning itself to meet surging demand for high-bandwidth, multi-die solutions that customers increasingly prefer over monolithic scaling.

Why packaging matters — and the geopolitical backdrop

Why does packaging matter so much? Packaging lets chipmakers combine different process nodes, memory and logic into a single, high-performance module without relying solely on the slow march of Moore’s Law. That matters for hyperscalers and AI firms sprinting to deploy larger, more power-hungry models. It also matters geopolitically: export controls and trade policy have constrained where and how advanced chips and tools can be produced, so packaging can become a strategic lever in a fragmented supply chain.

Can Intel close the gap? Intel has invested heavily in Foveros and other advanced integration tech as part of its bid to regain foundry relevance, but it faces an uphill climb against TSMC’s customer base, manufacturing scale and specialized packaging know‑how. For now, the reported CoWoS expansion underscores TSMC’s bet that system-level integration, not just die performance, will decide the next phase of semiconductor competition — though the numbers remain reported and could change as capacity plans are finalized.

SemiconductorsSpace
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