What is the value of Huawei's "Tao Law" (韬定律)? Expert analysis

Lead: a new scaling axis

Huawei (华为) is pitching a different answer to the limits of Moore's Law: shrink time, not just geometry. The so‑called "Tao Law" (韬定律) reframes AI scaling by targeting the system time constant τ across device, circuit, chip and system levels to cut the data‑movement bottleneck that now dominates AI inference. Why does this matter? Because, experts say, AI inference today is less limited by raw floating‑point throughput and more by how fast and cheaply systems can move and access weights and activations.

What is Tao Law proposing?

Tian Feng (田丰), director of the Fast‑Thinking Slow‑Thinking Research Institute (快思慢想研究院), and Zhang Xiaorong (张孝荣), director of the Deep Technology Research Institute (深度科技研究院), told reporters that the approach combines four levers: logic‑folding (vertical re‑layout inside a die), near‑memory computing, circuit/device optimizations to cut parasitics, and system‑level interconnect redesign. It has been reported that Huawei’s paper claims over 80% of AI cluster energy is spent on data movement and that more than 70% of system cost is tied to storage; TrendForce reportedly expects HBM demand growth to exceed 70% year‑on‑year in 2026. The practical upshot: reduce latencies and energy per bit by moving computation closer to data and by shortening physical signal paths.

Strategic context: constrained nodes, new options

This pivot is also political and industrial. US export controls and other trade frictions have limited some Chinese firms’ access to the most advanced EUV nodes, making design‑level breakthroughs strategically attractive. Tian argues logic folding can yield sizeable transistor‑density gains at existing nodes — reportedly a single‑generation ~55% uplift — by redistributing gates across vertical active layers rather than relying solely on process shrinks. Put simply: if you cannot buy the next node, you can redesign the time budget of your chips. That resonates with industry moves toward CXL and near‑memory architectures aimed at cutting cross‑node traffic.

Reception and the debate ahead

Not everyone is persuaded that Tao Law is wholly novel. Critics say some elements mirror 2.5D/3D packaging and known near‑memory ideas. Zhang counters that logic folding is a design‑tool innovation inside the die, distinct from packaging, and that the two approaches are complementary rather than interchangeable. What remains clear is the question this agenda forces: will the next big leap in AI infrastructure be won on process technology, or on minimizing τ across the full stack? Huawei’s framing attempts to turn constraint into a new competitive axis — but validation will depend on real‑world cluster deployments and the economics of inference at scale.